Share your story and shine at JK Monitor!🌟 Welcome to JK Monitor, where every story matters and every achievement is celebrated! We invite you to share the remarkable journey of your life and showcase your accomplishments to the world. Join our exclusive interviews that honor exceptional individuals just like you. JAMMU: The Department of Electronics and Communication Engineering, Central University of Jammu, successfully organized a two-day hands-on workshop on “RISC-V Implementation: From Synthesis to GDSII” on October 31 and November 1, 2026. The workshop aimed to provide students with practical exposure to RISC-V architecture and the complete Application-Specific Integrated Circuit (ASIC) design implementation flow.
The workshop was conducted under the esteemed guidance and leadership of the Hon’ble Vice Chancellor, Prof. Sanjeev Jain, reflecting the University's continued commitment to promoting experiential learning, technological innovation, and industry-oriented education in emerging areas of semiconductor technology and VLSI design.
The workshop featured expert sessions by Mr. Bharathwaj Thirumalai Ananthanpillai, Director, Silicon Engineering, Chennai, Tamil Nadu, who shared his valuable industry experience and insights into emerging developments in semiconductor technology and chip design. The sessions covered key aspects of RISC-V architecture, Register Transfer Level (RTL) design, logic synthesis, ASIC physical design, and GDSII generation, providing students with an understanding of the complete journey from design specifications to final chip layout.
A significant component of the workshop was dedicated to hands-on learning and practical demonstrations. Students gained exposure to industry-oriented design methodologies and tools, strengthening their understanding of digital hardware design and semiconductor implementation. The interactive sessions also provided an opportunity for students to engage directly with the expert, clarify their queries, and gain valuable insights into career opportunities in the rapidly growing semiconductor and VLSI domains.
The workshop was organized by Prof. Garima Mathur, Professor, Department of Electronics and Communication Engineering, with the support and guidance of Prof. Rakesh Jha, Head, Department of Electronics and Communication Engineering. The successful organization of the workshop reflects the University's commitment to advancing semiconductor education, encouraging experiential learning, and strengthening industry–academia collaboration.
The workshop witnessed enthusiastic participation from students and faculty members and served as a valuable platform for enhancing practical skills and technical knowledge in the rapidly evolving fields of VLSI, RISC-V architecture, and semiconductor chip design.
Through such initiatives, the Central University of Jammu continues to foster innovation, technical excellence, and industry-relevant competencies among students, preparing them to contribute meaningfully to the emerging semiconductor ecosystem and the vision of a technologically self-reliant India.
